ENEE408C

Capstone Design Project: Modern Digital System Design

Prerequisite: ENEE 350. A real-world digital system design experience that prepares students for careers in FPGA and ASIC design. Student teams use the Verilog hardware description language together with industry-standard simulation and synthesis tools to design medium-complexity digital chips that are ultimately configured and tested on FPGAs with real-world applications. Results from these projects will be presented through in-class presentations and written reports.

Sister Courses: ENEE408A, ENEE408D, ENEE408E, ENEE408G, ENEE408I, ENEE408J, ENEE408K, ENEE408L, ENEE408M, ENEE408N, ENEE408R, ENEE408T, ENEE408U, ENEE408V, ENEE408W

Spring 2026

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Fall 2025

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Past Semesters

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1 review
Average rating: 1.00

During the Spring 2020 and Spring 2021 semesters, students could choose to take some of their courses pass-fail mid-semester which skews grade data aggregated across multiple semesters.

Average GPA of 3.48 between 189 students*

ENEE408C Grade Distribution+-0510152025303540455055606570% of studentsABCDFWother
A-: 16.93%
A: 36.51%
A+: 12.17%
B-: 2.65%
B: 13.23%
B+: 10.58%
C-: 1.06%
C: 1.59%
C+: 1.59%
W: 3.7%
* "W"s are considered to be 0.0 quality points. "Other" grades are not factored into GPA calculation. Grade data not guaranteed to be correct.